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vishay siliconix DG408/409 document number: 70062 s-71155?rev. g, 11-jun-07 www.vishay.com 1 8-ch/dual 4-ch high-performance cmos analog multiplexers features ? low on-resistance - r ds(on) : 100 ? low charge injection - q: 20 pc ? fast transition time - t trans : 160 ns ? low power - i supply : 10 a ? single supply capability ? 44 v supply max rating ? ttl compatible logic benefits ? reduced switching errors ? reduced glitching ? improved data throughput ? reduced power consumption ? increased ruggedness ? wide supply ranges ( 5 v to 20 v) applications ? data acquisition systems ? audio signal routing ? ate systems ? battery powered systems ? high rel systems ? single supply systems ? medical instrumentation description the DG408 is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (a 0 , a 1 , a 2 ). the dg409 is a dual 4-channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2-bit binary address (a 0 , a 1 ). break-before-make switching action protects against momentary crosstalk between adjacent channels. an on channel conducts current equally well in both directions. in the off state each channel blocks voltages up to the power supply rails. an enable (en) function allows the user to reset the multiplexer/dem ultiplexer to all switches off for stacking several devices. all control inputs, address (a x ) and enable (en) are ttl compatible over the full specified operating temperature range. applications for the DG408/409 include high speed data acquisition, audio signal switching and routing, ate systems, and avionics. high performance and low power dissipation make them ideal for battery operated and remote instrumentation applications. designed in the 44 v silicon-gate cmos process, the absolute maximum voltage rating is extended to 44 v. additionally, single supply operation is also allowed. an epitaxial layer prevents latchup. for additional information please see technical article ta201 (faxback number 70600). functional block diagram and pin configuration * pb containing terminations are not rohs compliant, exemptions may apply s 3 a 0 s 6 d s 4 a 1 s 8 s 7 en dual-in-line soic and tssop a 2 v- gnd s 1 v+ s 2 s 5 decoders/drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 top view 89 DG408 dual-in-line soic and tssop 9 a 0 d a a 1 d b en gnd v- v+ s 1a s 1b s 2a s 2b s 3a s 3b s 4a s 4b decoders/drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 top view 8 dg409 available pb-free rohs* compliant www..net
www.vishay.com 2 document number: 70062 s-71155?rev. g, 11-jun-07 vishay siliconix DG408/409 truth tables and ordering information logic "0" = v al 0.8 v logic "1" = v ah 2.4 v x = don?t care notes: a. signals on s x , d x or in x exceeding v+ or v- will be clamped by internal diodes. limit forward diode current to maximum current ratings. b. all leads soldered or welded to pc board. c. derate 6 mw/c above 75 c. d. derate 7.6 mw/c above 75 c. e. derate 12 mw/c above 75 c. f. derate 10 mw/c above 75 c. truth table - DG408 a 2 a 1 a 0 en on switch x x x 0 none 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 truth table - dg409 a 1 a 0 en on switch x x 0 none 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 ordering information - DG408 temp range package part number - 40 to 85 c 16-pin plastic dip DG408dj DG408dj-e3 16-pin soic DG408dy DG408dy-e3 DG408dy-t1 DG408dy-t1-e3 16-pin tssop DG408dq DG408dq-e3 DG408dq-t1 DG408dq-t1-e3 ordering information - dg409 temp range package part number - 40 to 85 c 16-pin plastic dip dg409dj dg409dj-e3 16-pin soic dg409dy dg409dy-e3 dg409dy-t1 dg409dy-t1-e3 16-pin tssop dg409dq dg409dq-e3 dg409dq-t1 dg409dq-t1-e3 absolute maximum ratings parameter limit unit voltages referenced to v- v+ 44 v gnd 25 digital inputs a , v s , v d (v-) - 2 to (v+) + 2 or 20 ma, whichever occurs first current (any terminal) 30 ma peak current, s or d (pulsed at 1 ms, 10 % duty cycle max) 100 storage temperature (ak suffix) - 65 to 150 c (dj, dy suffix) - 65 to 125 power dissipation (package) b 16-pin plastic dip c 450 mw 16-pin narrow soic and tssop d 600 16-pin cerdip e 900 lcc-20 f 750
document number: 70062 s-71155?rev. g, 11-jun-07 www.vishay.com 3 vishay siliconix DG408/409 specifications a parameter symbol test conditions unless otherwise specified v+ = 15 v, v- = - 15 v v al = 0.8 v, v ah = 2.4 v f temp b typ c a suffix - 55 to 125 c d suffix - 40 to 85 c unit min d max d min d max d analog switch analog signal range e v analog full - 15 15 - 15 15 v drain-source on-resistance r ds(on) v d = 10 v, i s = - 10 ma room full 40 100 125 100 125 r ds(on) matching between channels g r ds(on) v d = 10 v room 15 15 % source off leakage current i s(off) v s = 10 v v d = 10 v, v en = 0 v room full - 0.5 - 50 0.5 50 - 0.5 - 5 0.5 5 na drain off leakage current i d(off) v d = 10 v v s = 10 v v en = 0 v DG408 room full - 1 - 100 1 100 - 1 - 20 1 20 dg409 room full - 1 - 50 1 50 - 1 - 10 1 10 drain on leakage current i d(on) v s = v d = 10 sequence each switch on DG408 room full - 1 - 100 1 100 - 1 - 20 1 20 dg409 room full - 1 - 50 1 50 - 1 - 10 1 10 digital control logic high input voltage v inh full 2.4 2.4 v logic low input voltage v inl full 0.8 0.8 logic high input current i ah v a = 2.4 v, 15 v full - 10 10 - 10 10 a logic low input current i al v en = 0 v, 2.4 v, v a = 0 v full - 10 10 - 10 10 logic input capacitance c in f = 1 mhz room 8 pf dynamic characteristics transition time t trans see figure 2 full 160 250 250 ns break-before-make interval t open see figure 4 room 10 10 enable turn-on time t on(en) see figure 3 room full 115 150 225 150 enable turn-off time t off(en) room 105 150 150 charge injection q c l = 10 nf, v s = 0 v room 20 pc off isolation h oirr v en = 0 v, r l = 1 k f = 100 khz room - 75 db source off capacitance c s(off) v en = 0 v, v s = 0 v, f = 1 mhz room 3 pf drain off capacitance c d(off) v en = 0 v v d = 0 v f = 1 mhz DG408 room 26 dg409 room 14 drain on capacitance c d(on) DG408 room 37 dg409 room 25 power supplies positive supply current i+ v en = v a = 0 v or 5 v full 10 75 75 a negative supply current i- full 1 - 75 - 75 positive supply current i+ v en = 2.4 v, v a = 0 v room full 0.2 0.5 2 0.5 2 ma negative supply current i- full - 500 - 500 a
www.vishay.com 4 document number: 70062 s-71155?rev. g, 11-jun-07 vishay siliconix DG408/409 notes: a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function. g. r ds(on) = r ds(on) max - r ds(on) min. h. worst case isolation occurs on channel 4 due to proximity to the drain pin. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications a for single supply parameter symbol test conditions unless otherwise specified v+ = 12 v, v- = 0 v v al = 0.8 v, v ah = 2.4 v f temp b typ c a suffix - 55 to 125 c d suffix - 40 to 85 c unit min d max d min d max d analog switch drain-source on-resistance e,f r ds(on) v d = 3 v, 10 v, i s = - 1 ma room 90 dynamic characteristics switching time of multiplexer e t trans v s1 = 8 v, v s8 = 0 v, v in = 2.4 v room 180 ns enable turn-on time e t on(en) v inh = 2.4 v, v inl = 0 v v s1 = 5 v room 180 enable turn-off time e t off(en) room 120 charge injection e q c l = 1 nf, v s = 6 v, r s = 0 room 5 pc
document number: 70062 s-71155?rev. g, 11-jun-07 www.vishay.com 5 vishay siliconix DG408/409 typical characteristics 25 c, unless otherwise noted source/drain capacitance vs. analog voltage drain leakage current vs. source/drainvoltage input switching threshold vs. supply voltage (pf) c s, d v analog ? analog voltage (v) 015 - 15 0 20 40 80 60 v+ = 15 v v- = - 15 v c d(off) c s(off) - 10 - 5 5 10 c d(on) DG408 i d(on) , i d(off) (pa) i d v d or v s - drain or source voltage (v) 015 - 15 - 140 - 60 20 100 60 - 20 - 100 v+ = 15 v v- = - 15 v v s = -v d for i d(off) v d = v s(open) for i d(on) dg409 i d(off) - 10 - 5 5 10 dg409 i d(on) (v) th v +v supply (v) 12 20 48 16 0.0 0.5 2.0 1.5 1.0 drain leakage current vs. source/drain voltage (single 12-v supply) source leakage current vs. source voltage negative supply current vs. switching frequency v analog ? analog v oltage (v) (pa) i d 12 010 6 24 8 - 60 - 40 - 20 60 40 0 20 DG408 i d(off) dg409 i d(off) dg409 i d(on) DG408 i d(on) v s = 0 v for i d(off) v s = v d for i d(on) v s - source voltage (v) 015 - 15 - 10 0 10 20 15 5 - 5 v+ = 15 v v- = - 15 v v+ = 12 v v- = 0 v - 10 - 5 5 10 i s(off) (pa) switching frequency (hz) 10 k 10 m 1 0 0 1 k 100 k 1 m v su ppl y = 15 v - 100 ma - 1 ma - 100 a - 10 a - 1 a - 0.1 a - 10 ma v en = 2.4 v v en = 0 v or 5 v i-
www.vishay.com 6 document number: 70062 s-71155?rev. g, 11-jun-07 vishay siliconix DG408/409 typical characteristics 25 c, unless otherwise noted positive supply current vs. switching frequency positive supply current vs. temperature (DG408) r ds(on) vs. v d and supply switching frequency (hz) 10 k 10 m 100 1 k 100 k 1 m v supply = 15 v 100 ma 10 ma 1 ma 100 a 10 a v en = 2.4 v v en = 0 v or 5 v i+ i+ (a) temperature (c) 5 15 20 10 125 - 55 85 45 5 0 v+ = 15 v v- = - 15 v v in = 0 v v en = 0 v - 35 - 15 25 65 105 r ds(on) ( ) v d - drain v oltage (v) 0 40 100 60 80 120 20 - 20 - 12 - 8 - 4 0 4 8 1 2 1 6 2 0 - 16 5 v 8 v 10 v 12 v 20 v 15 v i supply vs. temperature charge injection vs. analog voltage r ds(on) vs. v d and supply (single supply) i+, i- temperature (c) 125 - 55 85 45 5 v su ppl y = 15 v v a = 0 v v en = 0 v i+ - (i-) 100 a 1 a 100 na 10 na 1 na 100 pa 10 pa 10 a - 35 - 15 25 65 105 q (pc) v s - source voltage (v) - 10 30 50 90 70 40 0 80 60 20 10 015 - 15 - 10 - 5 5 10 v+ = 15 v v- = - 15 v v+ = 12 v v- = 0 v c l = 10000 pf v in = 5 vp-p r ds(on) ( ) v d - drain voltage (v) 22 0 0 40 100 60 140 160 80 120 20 4 8 12 16 20 v+ = 7.5 v 10 v 12 v 15 v 20 v 22 v v- = 0 v
document number: 70062 s-71155?rev. g, 11-jun-07 www.vishay.com 7 vishay siliconix DG408/409 typical characteristics 25 c, unless otherwise noted r ds(on) vs. v s and temperature off isolation and crosstalk vs. frequency switching time vs. bipolar supply) r ds(on) ( ) v s - source v oltage (v) 0 15 - 15 0 40 60 80 50 10 70 30 20 v+ = 15 v v- = - 15 v 125 c 85 c 25 c - 55 c - 10 - 5 5 1 0 - 40 c 0 c (db) f - frequency (hz) 10 k 10 m - 30 - 70 - 90 - 50 100 1 k 100 k 1 m - 110 100 m - 130 - 150 v+ = 15 v v- = - 15 v r l = 1 k off-isolation crosstalk t (ns) v supply (v) 75 125 200 150 175 100 t off(en) t on(en) t trans 10 12 14 16 18 20 22 r ds(on) vs. v s and temperature (single supply) insertion loss vs. frequency switching time vs. single supply r ds(on) ( ) v s - source v oltage (v) 12 8 4 0 10 30 50 70 90 11 0 130 v+ = 12 v v- = 0 v - 55 c - 40 c 0 c 125 c 85 c 25 c 26 10 loss (db) f - frequency (hz) 10 m - 5 - 2 1 - 1 0 - 4 - 3 - 6 v+ = 15 v v- = - 15 v ref. 1 vrms r l = 50 r l = 1 k 10 100 1 k 10 k 100 k 1 m 100 m t (ns) v supply (v) 15 8 100 150 225 175 200 250 125 91214 13 11 10 275 t trans t off(en) t on(en)
www.vishay.com 8 document number: 70062 s-71155?rev. g, 11-jun-07 vishay siliconix DG408/409 schematic diagram (typical channel) test circuits figure 1. en a 0 s 1 d v+ s n v- decode/ drive level shift v- v+ v ref a x gnd v+ figure 2. transition time a 1 a 0 a 2 a 1 a 0 + 15 v - 15 v en v+ v- gnd d 35 pf v o s 1 s 2 - s 7 s 8 50 300 10 v 10 v + 15 v - 15 v en v+ v- gnd 35 pf v o s 1 s 1a - s 4a , d a s 4b 50 300 10 v 10 v d b logic input switch output v s8 v o t trans t r < 20 ns t f < 20 ns s 8 on s 1 on t trans 0 v v s1 50 % 90 % 90 % 3 v 0 v DG408 dg409
document number: 70062 s-71155?rev. g, 11-jun-07 www.vishay.com 9 vishay siliconix DG408/409 test circuits figure 3. enable switching time logic input switch output v o t r < 20 ns t f < 20 ns 3 v 0 v 0 v t off(en ) t on(en) 50 % 90 % 10 % v o en s 1 s 2 - s 8 a 0 a 1 a 2 50 1 k v o v+ gnd v- d - 5 v 35 pf - 15 v + 15 v s 1b s 1a - s 4a , d a s 2b - s 4b d b en a 0 a 1 50 1 k v o v+ gnd v- - 5 v 35 pf - 15 v + 15 v DG408 dg409 figure 4. break-before-make interval 50 % 80 % logic input switch output v o v s t open t r < 20 ns t f < 20 ns 0 v 3 v 0 v en v+ gnd v- + 5 v 35 pf - 15 v + 15 v + 2.4 v a 2 d b , d all s and d a 300 v o 50 a 1 a 0 DG408 dg409
www.vishay.com 10 document number: 70062 s-71155?rev. g, 11-jun-07 vishay siliconix DG408/409 test circuits figure 5. charge injection a 0 en a 1 a 2 v o v+ gnd v- d - 15 v + 15 v r g s x c l 10 nf channel select 3 v 0 v off on logic input switch output v o v o is the measured voltage due to charge transfer error q, when the channel turns off. q = c l x v o off figure 6. off isolation figure 8. insertion loss r l 1 k v o v+ gnd v- - 15 v + 15 v a 2 d a 1 a 0 s 8 s x v s en r g = 50 off isolation = 20 log v out v in v in r l 1 k a 2 v o d r g = 50 insertion loss = 20 log v out a 1 v in a 0 v s s 1 v+ gnd v- - 15 v + 15 v en figure 7. crosstalk figure 9. source drain capacitance r l 1 k v o v+ gnd v- - 15 v + 15 v a 2 d a 1 a 0 s 8 s x v s en r g = 50 crosstalk = 20 log v out v in v in s 1 f = 1 mhz s 1 d en + 15 v - 15 v gnd v+ v- meter hp4192a impedance analyzer or equivalent s 8 a 1 a 2 a 0 channel select
document number: 70062 s-71155?rev. g, 11-jun-07 www.vishay.com 11 vishay siliconix DG408/409 applications hints overvoltage protection a very convenient form of overvoltage protection consists of adding two small signal diodes (1n4148, 1n914 type) in series with the supply pins (see figure 10). this arrangement effectively blocks the flow of reverse currents. it also floats the supply pin above or below the normal v+ or v- value. in this case the overvoltage signal actually becomes the power supply of the ic. from the point of view of the chip, nothing has chan ged, as long as the difference vs - (v-) doesn?t exceed + 44 v. the addition of these diodes will reduce the analog signal range to 1 v below v+ and 1 v above v-, but it preserves the low channel resistance and low leakage characteristics. vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?70062 . figure 10. overvoltage protection using blocking diodes 1n4148 DG408 d v- v+ 1n4148 s x v g figure 11. en a 0 a 1 + 15 v (mux on-off control) analog inputs (outputs) clock in nc enable in analog output (input) + 15 v - 15 v DG408 d en gnd dm7493 v+ v- nc gnd + 15 v analog inputs (outputs) analog outputs (inputs) + 15 v - 15 v dg409 gnd v+ v- differential differential clock in nc gnd + 15 v nc 6 reset enable j k clk j k clk clear clear q s 5 s 7 s 6 s 8 s 1 s 3 s 2 s 4 s 1a s 3a s 2a s 4a s 1b s 3b s 2b s 4b d a d b a 0 a 1 a 2 b in a in r 01 r 02 q b q c q d q a 1/2 mm74c73 1/2 mm74c73 q q q 8-channel sequential multiplexer/demultiplexer differential 4-channel sequential multiplexer/demultiplexer
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.

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